At present, television broadcasting in Japan is digital broadcasting. In order to demodulate digital broadcasting to obtain high definition signals, digitization of demodulator circuits in television receivers is also underway.
FIG. 1 is a functional block diagram showing an example of a reception device used for a tuner of a television receiver.
The reception device 10 shown in FIG. 1 includes an antenna 1, an RF filter 2, a variable gain amplifier circuit 3, an RF filter 4, a frequency converter circuit 5, an analog-to-digital converter circuit (referred to as ADC in FIG. 1) 6, an overload detector circuit 7, an integrator 8, and a selector circuit 9. The reception device 10 is an automatic gain control system that controls the gain of the variable gain amplifier circuit 3 on the basis of amplitude information of a signal output from the analog-to-digital converter circuit (hereinafter referred to as an AD converter circuit) 6.
The RF filters 2, 4 are used when a signal in an RF (radio frequency) band is received by using the antenna 1 for the purpose of suppressing interference wave signals that lead to degradation in the quality of the received signal. Specifically, the RF filters 2, 4 have functions of a band-pass filter configured to allow a signal in a desired frequency band to pass therethrough and block signals in the other frequency bands. The variable gain amplifier circuit 3 is an amplifier circuit for increasing the level (amplitude) of a received signal, and the gain thereof varies linearly or log-linearly with control voltage applied thereto.
The frequency converter circuit 5 is used for down-converting a broadcast wave signal modulated onto a carrier wave to a frequency band that can be processed by the AD converter circuit 6. A mixer, for example, is applied as the frequency converter circuit 5. The mixer receives a local oscillator signal (LO signal) input from a PLL (phase locked loop) that is a known local oscillator, multiplies the LO signal and the received signal together, and outputs an intermediate frequency signal (hereinafter also referred to as “IF”).
The AD converter circuit 6 is used for converting the received signal from an analog signal to a digital signal. A ΔΣ (delta-sigma) AD converter circuit having a frequency circuit 6 or the like is used as the AD converter circuit 6.
The overload detector circuit 7 is a circuit for detecting an interference wave signal that degrades the quality of the received signal. Since the level of the interference wave signal to be detected is sufficiently higher than that of a desired wave signal, detection is not performed on the desired wave signal.
FIG. 2 shows an example structure of the overload detector circuit of the related art.
The overload detector circuit 7 shown in FIG. 2 includes a comparator circuit 11 and a peak hold circuit 12. The comparator circuit 11 is a circuit configured to compare the amplitude of the input signal with an output value (threshold) of a reference signal set in advance and output the comparison result. The output signal has one bit or multiple bits. Since the peak portion of a modulated wave signal has a waveform close to that of an impulse signal, the output of the comparator circuit 11 cannot be integrated by using only an integrator with a large time constant. Accordingly, the peak hold circuit 12 is placed upstream of the integrator 8 so as to hold the peak value of the signal and enable integration of the output of the comparator circuit 11.
The description refers back to the reception device 10 in FIG. 1. The integrator 8 is a circuit for integrating the one-bit or multi-bit signal output from the overload detector circuit 7.
The selector circuit 9 is a circuit for selecting a control signal for an automatic gain control loop output from a demodulator circuit or a control signal for an overload loop from the overload detector circuit 7. The selector circuit 9 is set so that the automatic gain control loop is normally selected and a loop for lowering the gain of the variable gain amplifier circuit 3 is selected when the overload detector circuit 7 operates according to an interference wave signal. In this manner, the selector circuit 9 switches from the automatic gain control loop as necessary according to the configuration or selects a maximum value or a minimum value of an input signal (voltage).
In a typical automatic gain control system, the level of the desired wave signal input to the AD converter circuit 6 is properly controlled by the automatic gain control loop from the demodulator circuit. If an interference wave signal exists, however, the automatic gain control loop using a control signal from the modulator circuit cannot perform control taking the interference wave into account. When an interference wave signal that is particularly greater than the desired wave signal exists, excessive input to the AD converter circuit 6 is therefore a problem in addition to signal distortion. If excessive input to the AD converter circuit 6 occurs, the information of the signal may be lost and oscillation may be generated by a ΔΣ AD converter circuit or the like. Excessive input to the AD converter circuit 6 should therefore be prevented.
FIG. 3 is a graph showing a frequency characteristic (broken line) of a ΔΣ AD converter circuit and a spectrum of a signal input to the ΔΣ AD converter circuit when an interference wave signal exists.
If the frequency band of the interference wave signal is greatly separated from the frequency band of the desired wave signal, the level of the interference wave signal (interference wave signal A) is sufficiently suppressed by the RF filters 2, 4. If the frequency band of the interference wave signal is close thereto, the suppression by the RF filters 2, 4 is small due to the characteristics thereof, and the interference wave signal is input substantially without any change to the AD converter circuit 6. In order to avoid the above, it is necessary to detect the level of the interference wave signal by the overload detector circuit 7, and control the gain of the variable gain amplifier circuit 3 on the basis of the detection information to lower the level of the interference wave signal to an appropriate level. In this process, the selector circuit 9 selects a control signal that lowers the gain more greatly than the other from the control signal of the automatic gain control loop from the modulator circuit and the control signal of the overload loop from the overload detector circuit 7.
For example, a radio reception device for realizing an AGC function without requiring any anti-aliasing filter having a sharp cut-off characteristic is proposed (refer, for example, to PTL 1).